This invention relates generally to a method for manufacturing a semiconductor device, and more particularly to a process for manufacturing a semiconductor device including a trench extending into the device substrate from the surface.
Semiconductor integrated circuit devices are becoming increasingly complex, incorporating more components having a smaller feature size and greater packing density. To maximize the size of an individual circuit component while minimizing the amount of surface area which the component occupies on the chip surface, some components are being implemented as vertical structures extending into the device substrate rather than as conventional horizontal structures. One way to maximize component size in this manner, for example, is to form a trench in the device substrate extending into the substrate from the substrate surface. Individual components are then fabricated on the vertical walls of the trench or the trench is properly refilled to form a device component. In this manner, trench capacitors and vertical resistors as well as vertical transistors can be fabricated. A trench capacitor, either PN junction or MOS, maximizes the size of the capacitor by having the PN junction or MOS interface positioned along the vertical trench wall rather than spread out across the surface of the semiconductor substrate. In fact, all of the walls of the trench, both side and bottom, contribute to the area of the capacitor.
Isolation between two adjacent components of the integrated circuit can be achieved with the use of minimum surface area by etching a narrow trench extending into the substrate between the two components and then refilling the trench with an insulator. Trench isolation uses much less surface area than does either diffused junction isolation or oxide isolation of the localized oxidation variety.
High quality, high integrity devices require the semiconductor material along the edge of the trench to be of high quality with a minimum of process induced defects. Reactive ion etching, which is a preferred method for anisotropically etching narrow, deep trenches, has a tendency to produce a thin defect layer along the trench walls. Defects of this type lower device yield and degrade device performance because they provide recombination sites which increase leakage currents. If the trench is used to form a trench capacitor, for example, the increased leakage currents cause the loss of information stored dynamically on the PN junction capacitor. Further, the defect level can result in emitter-collector leakage or shorts if the trench is used for isolation between bipolar transistors and the emitter junction is positioned to abut the trench isolation.
The presence of a trench in a semiconductor substrate adds to the difficulties of processing an integrated circuit device. The existence of a sharp corner where the trench intersects the surface of the semiconductor substrate leads to difficulties in filling the trench or in providing a conductive lead which passes over the corner from the substrate surface to the trench. Deposition in the vicinity of the corner is nonuniform and may even be discontinuous. The nonuniform deposition, which is directly related to the "sharpness" of the corner which the deposited material must traverse, can result in yield loss or can compromise long term reliability.
In view of the foregoing difficulties, it is apparent that a need existed for a process which would provide a trench in a semiconductor substrate in which the walls of the trench are relatively defect free and the corners are gently rounded.
It is therefore an object of this invention to provide an improved process for forming trenches in a semiconductor substrate.
It is another object of this invention to provide an improved process for forming semiconductor devices.